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Updated: Intel details roadmap to more cores

Intel has detailed its upcoming activities, including some info on Nehalem

Written by Daniel Robinson

Intel has introduced new energy-efficient processors for servers and workstations offering quad-core performance within a 50W power envelope. The move follows Intel's earlier disclosure of plans for a six-core Xeon family and details of its new processor micro-architecture, both coming later this year.

The new Xeon L5420 and L5410 processors run at 2.50GHz and 2.33GHz respectively, and are 25 percent faster than its previous generation of low-voltage quad-core chips, according to Intel.

Vendors including Dell, Fujitsu-Siemens, HP and IBM said they will ship systems using the new chips, which are the latest to be manufactured using Intel's 45nm fabrication technology.

While the low-power Xeons are targeted at energy-conscious datacentre manager, Intel also unveiled updates for the performance hungry. Its first six-core processors are expected in the second half of 2008.

Codenamed Dunnington, the chips will be socket-compatible with current quad-core Xeon parts, but add a 16MB L3 cache in addition to the extra cores.

Intel vice president Stephen Smith said that Dunnington will extend Intel's leadership in the server market, with better energy efficiency as well as increased performance.

"Expect a double-digit performance increase," he said, adding that it will also fit into an 80W power envelope.

Before the end of 2008, Intel also expects to start production of its first Nehalem chips. This new micro-architecture is modular, enabling Intel to put together a chip from various building blocks, including versions with between two and eight cores. This lets Intel use the same basic architecture to build processors for laptops or high-performance servers.

Nehalem chips will have several enhancements to boost performance. The system bus gets replaced with high-speed point-to-point links called QuickPath Interconnect, while an on-chip memory controller with three memory channels w ill support DDR3 memory at up 1333MHz clock speeds. Each core will also be able to execute two code threads simultaneously.

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